1. Field of the Invention
The present invention relates to charge-transfer circuits for generating a sequence of predetermined charge packets, and more particularly to a bucket brigade circuit for generating charge packets which may be used in digital-to-analog and analog-to-digital converter circuit applications for binary search.
2. Description of the Prior Art
The basic concept of using pairs of equal capacitors in circuits for producing charge quantities is known. A specific example of a two capacitor circuit employed for producing binary search signals for an analog-to-digital circuit is described in the publication "An ALL-MOS Charge-Redistribution A/D Conversion Technique", R. E. Suarez, P. R. Gray and D. A. Hodges, 1974 ISSCC Digest, p. 194, February 1974. The two capacitor circuit is shown in FIG. 2 thereof and consists of two equal capacitors C1 and C2 and three switches S1, S2, and S3 under logic control.
In FIG. 2, the digital-to-analog conversion begins with both capacitors discharged and is accomplished serially by considering the least significant bit b.sub.O first. If this bit is a one, S2 is closed momentarily charging C2 to V.sub.R ; if it is a zero, C2 is left discharged. Switch S1 is then closed momentarily, sharing charge between the capacitors and resulting in a voltage V.sub.out of EQU V.sub.out = [b.sub.O V.sub.R /2]
leaving the charge on D1, the precharging of C2 is repeated, this time considering the next least significant bit b.sub.1. After redistribution, the output voltage is EQU V.sub.out = (b.sub.O V.sub.R /4) + (b.sub.1 V.sub.R /2)
this repetitive procedure can be carried out for higher order bits.
The circuit described in the cited publication specifically generates a sequence of voltages for a binary search of the form V/2+V/4+V/8+ . . .etc. A circuit for generating a more general sequence of charge packets V/2, V/4, V/8 etc. which may be later combined to produce a binary search sequence is described in copending patent application Ser. No. 662,626, filed Mar. 1, 1976 in the names of L. G. Heller et al and assigned to the present assignee. In the copending application an embodiment of a bucket brigade charge transfer circuit employing two equal capacitors for charge redistribution is illustrated in FIG. 7 thereof. The bucket brigade circuit, when employed in analog-to-digital applications for binary search generation is an improvement over the circuit of the Suarez et al publication for the reasons set forth in the patent application.
The present invention relates to an improvement over the circuit of the copending application and also copending application Ser. No. 636,862, filed Dec. 2, 1975 in the name of L. G. Heller and assigned to the present assignee, because it permits the use of pairs of large capacitors for accuracy while still allowing high speed operation. The inventive concept is carried out by employing a relatively small capacitor in combination with the aforesaid two large capacitors, a feature which is not taught or suggested in the prior art references.